Gate dielectric thickness in, for example, CMOS technology is continually scaled down with each technology node. For instance, sub 100 nm CMOS (Complementary MOS) technology requires a gate dielectric, assuming a doped silicon dioxide (SiO2) layer with a layer thickness below 1.5 nm. However, reducing the SiO2 thickness below 3 nm has resulted in such deleterious effects as penetration of dopant atoms of the polysilicon gate, such as, for example, boron, and hence an unacceptable increase in gate tunneling current (gate leakage). This effect has become a significant limitation in CMOS downscaling as this is paired with an increasingly thin dielectric region being required. The addition of nitrogen (N) to the dielectric layer in order to form a dielectric layer of a silicon-oxy-nitride is very beneficial in this respect, because dopant atoms of a polysilicon gate, such as, for example, boron, are better stopped by such a dielectric layer. It has also been shown that increasing the amount of nitrogen in a SiO2 film results in an increased dielectric constant, which is between the dielectric constant of the pure oxide and silicon nitride. An increased dielectric constant makes it possible to create physically thicker films for a given electrical thickness, thereby reducing the gate leakage current. These features have extended the scalability of silicon dioxide to sub 100 nm technologies. Therefore, there is currently a drive to create a process that can successfully incorporate a large concentration of N in SiO2.
A method for incorporating nitride into a silicon oxide layer is described in U.S. Publ. No. 2003/0001218, which teaches a dielectric layer comprising a thermal silicon oxide that is provided with nitrogen atoms. The dielectric layer is made by thermal oxidation in a N2/O2 mixture ambient. The incorporation of nitrogen atoms is done by treatment of the dielectric layer in an ambient containing NO and a limited amount of oxygen. In this way, during the silicon-oxy-nitride formation, the peak of the nitrogen concentration is kept a very short distance away from the interface between the dielectric layer and the semiconductor body of silicon. In this way, the quality of the interface, and thus the device quality, is improved.
A drawback of the method described above is that the beneficial effect of the incorporation of nitrogen into the dielectric layer is still not satisfactory for very thin dielectric layers. Gate leakage may still occur in such cases. This drawback grows in importance as dielectric layers become thinner.